Publications and Presentations

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(Performance Modeling and Optimization (WP2))
(Logic Synthesis)
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== Logic Synthesis ==
 
== Logic Synthesis ==
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{| style="border:2px solid #abd5f5; background:#f1f5fc;"
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{|
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|- valign=top
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| width="100" |'''title''':
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| width="550"|[[Media:Bernasconi_EtAl_Logic_Synthesis_for_Switching_Lattices_P_Circuits.pdf | Logic Synthesis for Switching Lattices by Decomposition with P-Circuits]]
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|- valign="top"
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| '''authors''':
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| Anna Bernasconi, Valentina Ciriani, Luca Frontini, Valentino Liberali, Gabriella Trucco, and Tiziano Villa
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| '''presented at''':
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| [http://dsd-seaa2016.cs.ucy.ac.cy/index.php Euromicro Conference on Digital System Design (DSD)], Limassol, Cyprus, 2016.
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|}
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| align=center width="70" |
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<span class="plainlinks">
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[[File:PDF.png|65px|link=http://www.ecc.itu.edu.tr/images/5/59/Bernasconi_EtAl_Logic_Synthesis_for_Switching_Lattices_P_Circuits.pdf]]</span>
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<br>
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[[Media:Bernasconi_EtAl_Logic_Synthesis_for_Switching_Lattices_P_Circuits.pdf | Paper]]
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| align="center" width="70" |
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<span class="plainlinks">
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[[File:PPT.jpg|60px|link=]]
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</span>
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<br> Slides
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{| style="border:2px solid #abd5f5; background:#f1f5fc;"

Revision as of 22:36, 11 April 2017

All materials are subject to copyrights.

Contents

Comprehensive

title: Computing with Nano-Crossbar Arrays: Logic Synthesis and Fault Tolerance
authors: Mustafa Altun, Valentina Ciriani, and Mehdi Tahoori
presented at: Design, Automation, and Test in Europe (DATE), Lausanne, Switzerland, 2017.

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Paper

PPT.jpg
Slides

title: Synthesis and Performance Optimization of a Switching Nano-crossbar Computer
authors: Dan Alexandrescu, Mustafa Altun, Lorena Anghel, Anna Bernasconi, Valentina Ciriani,
and Mehdi Tahoori
presented at: Euromicro Conference on Digital System Design (DSD), Limassol, Cyprus, 2016.

PDF.png
Paper

PDF.png
Slides

Logic Synthesis

title: Logic Synthesis for Switching Lattices by Decomposition with P-Circuits
authors: Anna Bernasconi, Valentina Ciriani, Luca Frontini, Valentino Liberali, Gabriella Trucco, and Tiziano Villa
presented at: Euromicro Conference on Digital System Design (DSD), Limassol, Cyprus, 2016.

PDF.png
Paper

PPT.jpg
Slides

title: Synthesis and Optimization of Switching Nanoarrays
authors: Ceylan Morgul and Mustafa Altun
presented at: IEEE International Symposium on Design and Diagnostics of Electronic Circuits and Systems
(DDECS)
, Belgrade, Serbia, 2015.

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Paper

PPT.jpg
Slides

Performance Modeling and Optimization

title: Permanent and Transient Fault Tolerance for Reconfigurable Nano-Crossbar Arrays
authors: Onur Tunali and Mustafa Altun
accepted in: IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems, 2016.

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Paper

title: Power-Delay-Area Performance Modeling and Analysis for Nano-Crossbar Arrays
authors: Ceylan Morgul, Furkan Peker, and Mustafa Altun
presented at: IEEE Computer Society Annual Symposium on VLSI (ISVLSI), Pittsburgh, USA, 2016.

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Paper

PPT.jpg
Poster

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