Publications and Presentations
From NANOxCOMP H2020 Project
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== Logic Synthesis == | == Logic Synthesis == | ||
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+ | |- valign=top | ||
+ | | width="100" |'''title''': | ||
+ | | width="550"|[[Media:Bernasconi_EtAl_Synthesis_on_Switching_Lattices_D_Reducible.pdf | Synthesis on Switching Lattices of Dimension-Reducible Boolean Functions]] | ||
+ | |- valign="top" | ||
+ | | '''authors''': | ||
+ | | Anna Bernasconi, Valentina Ciriani, Luca Frontini, and Gabriella Trucco | ||
+ | |- valign=top | ||
+ | | '''presented at''': | ||
+ | | [http://ati.ttu.ee/vlsi-soc2016/ International Conference on Very Large Scale Integration (VLSI-SoC)], Tallinn, Estonia, 2016 | ||
+ | |} | ||
+ | |||
+ | | align=center width="70" | | ||
+ | <span class="plainlinks"> | ||
+ | [[File:PDF.png|65px|link=http://www.nanoxcomp.itu.edu.tr/images/c/c9/Bernasconi_EtAl_Synthesis_on_Switching_Lattices_D_Reducible.pdf]]</span> | ||
+ | <br> | ||
+ | [[Media:Bernasconi_EtAl_Synthesis_on_Switching_Lattices_D_Reducible.pdf | Paper]] | ||
+ | | align="center" width="70" | | ||
+ | <span class="plainlinks"> | ||
+ | |||
+ | [[File:PPT.jpg|60px|link=]] | ||
+ | </span> | ||
+ | <br> Slides | ||
+ | |} | ||
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Revision as of 22:46, 11 April 2017
All materials are subject to copyrights.
Comprehensive
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Logic Synthesis
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Performance Modeling and Optimization
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