BLG 231E: Digital Circuits
From NANOxCOMP H2020 Project
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Announcements
- Oct. 5th The second homework has been posted that is due 2/12/2016 before 9:30.
- Nov. 17th To see your grades click here.
- Oct. 5th The first homework has been posted that is due 21/10/2016 before 9:30.
- Aug. 26th The class is given in the room 5204 (second floor), EEF.
Syllabus
BLG 231E: Digital Circuits, CRN: 10647, Fridays 09:30-12:30, Room: 5204 (EEF), Fall 2016.
Instructor
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Teaching Assistant
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Furkan Peker
Ensar Vahapoğlu
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Grading
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Textbook
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Reference Books
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Policies
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Weekly Course Plan
Date
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Topic
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Week 1, 23/9/2016 | Introduction |
Week 2, 30/9/2016 | Digital logic fundamentals: gates, combinational circuits, Boolean expressions |
Week 3, 7/10/2016 | Digital logic fundamentals: truth tables, two-level forms (AND/OR/NAND/NOR), "don't cares" |
Weeks 4, 14/10/2016 | Logic minimization: Karnaugh maps, Quine-McCluskey method |
Weeks 5, 21/10/2016 | Quine-McCluskey method, binary decision diagrams, hazards |
Week 6, 28/10/2016 | Combinational circuit design: building blocks (adders, multiplexers, decoders, etc.) |
Weeks 7, 4/11/2016 | MIDTERM I |
Week 8, 11/11/2016 | HOLIDAY, no class |
Week 9, 18/11/2016 | Combinational circuit design: implementing Boolean and arithmetic operations |
Weeks 10, 25/11/2016 | Area-Delay Performance analysis of combinational circuits |
Week 11, 2/12/2016 | Sequential circuits: latches & flip-flops |
Week 12, 9/12/2016 | MIDTERM II |
Weeks 13, 16/12/2016 | Sequential circuit design: state graphs and tables, modules |
Weeks 14, 23/12/2016 | Sequential circuit design: modules, state machines |
Weeks 15, 30/12/2016 | Sequential circuit design: modules, state machines |
Course Materials
Homeworks & Solutions | Quizzes & Solutions | Exams |
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Homework 1 & Solutions | Quiz 1 & Solutions | Midterm 1 |
Homework 2 | ||