Publications and Presentations
From NANOxCOMP H2020 Project
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== Papers on Performance Modeling and Optimization == | == Papers on Performance Modeling and Optimization == | ||
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+ | {| style="border:2px solid #abd5f5; background:#f1f5fc;" | ||
+ | | | ||
+ | {| | ||
+ | |- valign=top | ||
+ | | width="100" |'''title''': | ||
+ | | width="624"|[[Media:Tunali_Altun_Multiple_type_Defect_Tolerance_in_Nano_Crossbar_Arrays.pdf | A Fast Logic Mapping Algorithm for Multiple-type-Defect Tolerance in Reconfigurable Nano-Crossbar Arrays]] | ||
+ | |- valign="top" | ||
+ | | '''authors''': | ||
+ | | Onur Tunali and [[Mustafa Altun]] | ||
+ | |- valign="top" | ||
+ | | '''accepted in''': | ||
+ | | width="624" | [http://ieeexplore.ieee.org/xpl/RecentIssue.jsp?punumber=6245516 IEEE Transactions on Emerging Topics in Computing], 2017. | ||
+ | |} | ||
+ | | align=center width="70" | | ||
+ | <span class="plainlinks"> | ||
+ | [[File:PDF.png|65px|link=http://www.ecc.itu.edu.tr/images/c/c9/Tunali_Altun_Multiple_type_Defect_Tolerance_in_Nano_Crossbar_Arrays.pdf]]</span> | ||
+ | <br> | ||
+ | [[Media:Tunali_Altun_Multiple_type_Defect_Tolerance_in_Nano_Crossbar_Arrays.pdf | Paper]] | ||
+ | |} | ||
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Revision as of 00:20, 1 August 2017
All materials are subject to copyrights.
Contents |
Comprehensive Project Papers
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Papers on Logic Synthesis
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Papers on Performance Modeling and Optimization
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Papers on Emerging Crossbar Memories
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