BLG 231E
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== Announcements == | == Announcements == | ||
− | * <span style="background:#4682B4; color:#FFFFFF; font-size: 100%;"> | + | * <span style="background:#4682B4; color:#FFFFFF; font-size: 100%;"> Jan. 15th</span> To see your final grades [[Media:blg231e-2016-fall-final-grades.pdf | '''click here''']]. |
− | + | * <span style="background:#4682B4; color:#FFFFFF; font-size: 100%;"> Dec. 16th</span> [[Media:blg231e-2016-fall-hw-03.pdf | '''The third homework''']] has been posted that is due '''30/12/2016''' before 9:30. | |
− | * <span style="background:#4682B4; color:#FFFFFF; font-size: 100%;"> | + | * <span style="background:#4682B4; color:#FFFFFF; font-size: 100%;"> Nov. 18th</span> [[Media:blg231e-2016-fall-hw-02.pdf | '''The second homework''']] has been posted that is due '''2/12/2016''' before 9:30. |
− | * <span style="background:#4682B4; color:#FFFFFF; font-size: 100%;"> | + | * <span style="background:#4682B4; color:#FFFFFF; font-size: 100%;"> Oct. 5th</span> [[Media:blg231e-2016-fall-hw-01.pdf | '''The first homework''']] has been posted that is due '''21/10/2016''' before 9:30. |
− | * <span style="background:#4682B4; color:#FFFFFF; font-size: 100%;"> Oct. | + | * <span style="background:#4682B4; color:#FFFFFF; font-size: 100%;"> Aug. 26th</span> The class is given in the room '''5204''' (second floor), EEF. |
− | * <span style="background:#4682B4; color:#FFFFFF; font-size: 100%;"> | + | |
== Syllabus == | == Syllabus == | ||
− | <div style="font-size: 120%;"> '''BLG 231E: Digital Circuits''', CRN: | + | <div style="font-size: 120%;"> '''BLG 231E: Digital Circuits''', CRN: 10647, Fridays 09:30-12:30, Room: 5204 (EEF), Fall 2016. </div> |
{| border="1" cellspacing="0" cellpadding="5" " width="80%" | {| border="1" cellspacing="0" cellpadding="5" " width="80%" | ||
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* Email: altunmus@itu.edu.tr | * Email: altunmus@itu.edu.tr | ||
* Tel: 02122856635 | * Tel: 02122856635 | ||
− | * Office hours: 15:00 – 16: | + | * Office hours: 15:00 – 16:00 on Tuesdays in Room:3005, EEF (or stop by my office any time) |
|- | |- | ||
| <div style="font-size: 120%;"> '''Teaching Assistant'''</div> | | <div style="font-size: 120%;"> '''Teaching Assistant'''</div> | ||
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* Email: furkan.peker061@gmail.com | * Email: furkan.peker061@gmail.com | ||
* Room: 3207 EEF | * Room: 3207 EEF | ||
+ | |||
+ | Ensar Vahapoğlu | ||
+ | * Email: ensarvahapoglu@gmail.com | ||
+ | * Room: 3007 EEF | ||
|- | |- | ||
| <div style="font-size: 120%;"> '''Grading'''</div> | | <div style="font-size: 120%;"> '''Grading'''</div> | ||
|| | || | ||
− | * Homeworks: ''' | + | * Quizzes: '''10%''' |
− | ** 3 homeworks ( | + | ** 2 pop-up quizzes (5% each) - '''no''' prior announcement of quiz dates and times |
+ | |||
+ | * Homeworks: '''10%''' | ||
+ | ** 3 homeworks (3.3% each) | ||
− | * Midterm Exams: ''' | + | * Midterm Exams: '''40%''' |
− | ** 2 midterms ( | + | ** 2 midterms (20% each) during the lecture time that will on '''4/11/2016''' and '''9/12/2016'''. |
* Final Exam: '''40%''' | * Final Exam: '''40%''' | ||
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| <div style="font-size: 120%;"> '''Textbook'''</div> | | <div style="font-size: 120%;"> '''Textbook'''</div> | ||
|| | || | ||
− | * Wakerly, J. F. ( | + | * Wakerly, J. F. (20XX). Digital Design Principles & Practices. Prentice Hall. |
|- | |- | ||
| <div style="font-size: 120%;"> '''Reference Books'''</div> | | <div style="font-size: 120%;"> '''Reference Books'''</div> | ||
|| | || | ||
− | * Roth Jr, C., & Kinney, L. ( | + | * Roth Jr, C., & Kinney, L. (20XX). Fundamentals of logic design. Cengage Learning. |
− | * Mano, M. M., & Kime, C. R. ( | + | * Mano, M. M., & Kime, C. R. (20XX). Logic and Computer Design Fundamentals. Prentice Hall. |
|- | |- | ||
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|| <div style="font-size: 120%;"> '''Topic'''</div> | || <div style="font-size: 120%;"> '''Topic'''</div> | ||
|- | |- | ||
− | | Week 1, | + | | Week 1, 23/9/2016 || Introduction |
|- | |- | ||
− | | Week 2, | + | | Week 2, 30/9/2016 || Digital logic fundamentals: gates, combinational circuits, Boolean expressions |
|- | |- | ||
− | | Week 3, | + | | Week 3, 7/10/2016 || Digital logic fundamentals: truth tables, two-level forms (AND/OR/NAND/NOR), "don't cares" |
|- | |- | ||
− | | Weeks 4, | + | | Weeks 4, 14/10/2016 || Logic minimization: Karnaugh maps, Quine-McCluskey method |
|- | |- | ||
− | | Weeks 5, | + | | Weeks 5, 21/10/2016 || Quine-McCluskey method, binary decision diagrams, hazards |
|- | |- | ||
− | | Week 6, | + | | Week 6, 28/10/2016 || Combinational circuit design: building blocks (adders, multiplexers, decoders, etc.) |
|- | |- | ||
− | | Weeks 7, | + | | Weeks 7, 4/11/2016 || MIDTERM I |
|- | |- | ||
− | | Week 8, | + | | Week 8, 11/11/2016 || HOLIDAY, no class |
|- | |- | ||
− | | Week 9, | + | | Week 9, 18/11/2016 || Combinational circuit design: implementing Boolean and arithmetic operations |
|- | |- | ||
− | | Weeks 10, | + | | Weeks 10, 25/11/2016 || Area-Delay Performance analysis of combinational circuits |
|- | |- | ||
− | | Week 11, | + | | Week 11, 2/12/2016 || Sequential circuits: latches & flip-flops |
|- | |- | ||
− | | Week 12, | + | | Week 12, 9/12/2016 || MIDTERM II |
|- | |- | ||
− | | Weeks 13, | + | | Weeks 13, 16/12/2016 || Sequential circuit design: state graphs and tables, modules |
|- | |- | ||
− | | Weeks 14, | + | | Weeks 14, 23/12/2016 || Sequential circuit design: modules, state machines |
|- | |- | ||
− | | Weeks 15, | + | | Weeks 15, 30/12/2016 || Sequential circuit design: modules, state machines |
|} | |} | ||
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{| border="1" cellspacing="0" cellpadding="5" | {| border="1" cellspacing="0" cellpadding="5" | ||
− | ! Homeworks & Solutions!! Exams | + | ! Homeworks & Solutions!! Quizzes & Solutions!! Exams |
|- | |- | ||
− | | | + | | [[Media:blg231e-2016-fall-hw-01.pdf | Homework 1]] & [[Media:blg231e-2016-fall-hw-01-solutions.pdf | Solutions]] || [[Media:blg231e-2016-fall-quiz-01.pdf | Quiz 1]] & [[Media:blg231e-2016-fall-quiz-01-solutions.pdf | Solutions]] || [[Media:blg231e-2016-fall-midterm-01.pdf | Midterm 1]] |
|- | |- | ||
− | | [[Media:blg231e- | + | | [[Media:blg231e-2016-fall-hw-02.pdf | Homework 2]] & [[Media:blg231e-2016-fall-hw-02-solutions.pdf | Solutions]] || [[Media:blg231e-2016-fall-quiz-02.pdf | Quiz 2]] & [[Media:blg231e-2016-fall-quiz-02-solutions.pdf | Solutions]] || [[Media:blg231e-2016-fall-midterm-02.pdf | Midterm 2]] |
|- | |- | ||
− | | || | + | | [[Media:blg231e-2016-fall-hw-03.pdf | Homework 3]] & [[Media:blg231e-2016-fall-hw-03-solutions.pdf | Solutions]] || || [[Media:blg231e-2016-fall-final.pdf | Final]] |
+ | |||
|} | |} |
Latest revision as of 10:40, 7 February 2017
Contents |
[edit] Announcements
- Jan. 15th To see your final grades click here.
- Dec. 16th The third homework has been posted that is due 30/12/2016 before 9:30.
- Nov. 18th The second homework has been posted that is due 2/12/2016 before 9:30.
- Oct. 5th The first homework has been posted that is due 21/10/2016 before 9:30.
- Aug. 26th The class is given in the room 5204 (second floor), EEF.
[edit] Syllabus
BLG 231E: Digital Circuits, CRN: 10647, Fridays 09:30-12:30, Room: 5204 (EEF), Fall 2016.
Instructor
|
|
Teaching Assistant
|
Furkan Peker
Ensar Vahapoğlu
|
Grading
|
|
Textbook
|
|
Reference Books
|
|
Policies
|
|
[edit] Weekly Course Plan
Date
|
Topic
|
Week 1, 23/9/2016 | Introduction |
Week 2, 30/9/2016 | Digital logic fundamentals: gates, combinational circuits, Boolean expressions |
Week 3, 7/10/2016 | Digital logic fundamentals: truth tables, two-level forms (AND/OR/NAND/NOR), "don't cares" |
Weeks 4, 14/10/2016 | Logic minimization: Karnaugh maps, Quine-McCluskey method |
Weeks 5, 21/10/2016 | Quine-McCluskey method, binary decision diagrams, hazards |
Week 6, 28/10/2016 | Combinational circuit design: building blocks (adders, multiplexers, decoders, etc.) |
Weeks 7, 4/11/2016 | MIDTERM I |
Week 8, 11/11/2016 | HOLIDAY, no class |
Week 9, 18/11/2016 | Combinational circuit design: implementing Boolean and arithmetic operations |
Weeks 10, 25/11/2016 | Area-Delay Performance analysis of combinational circuits |
Week 11, 2/12/2016 | Sequential circuits: latches & flip-flops |
Week 12, 9/12/2016 | MIDTERM II |
Weeks 13, 16/12/2016 | Sequential circuit design: state graphs and tables, modules |
Weeks 14, 23/12/2016 | Sequential circuit design: modules, state machines |
Weeks 15, 30/12/2016 | Sequential circuit design: modules, state machines |
[edit] Course Materials
Homeworks & Solutions | Quizzes & Solutions | Exams |
---|---|---|
Homework 1 & Solutions | Quiz 1 & Solutions | Midterm 1 |
Homework 2 & Solutions | Quiz 2 & Solutions | Midterm 2 |
Homework 3 & Solutions | Final |