Publications and Presentations
From NANOxCOMP H2020 Project
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== Papers on Performance Modeling and Optimization == | == Papers on Performance Modeling and Optimization == | ||
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+ | {| style="border:2px solid #abd5f5; background:#f1f5fc;" | ||
+ | |||
+ | | | ||
+ | {| | ||
+ | |- valign=top | ||
+ | | width="100" |'''title''': | ||
+ | | width="550"|[[Media:Testability of Switching Lattices.pdf |Testability of Switching Lattices in the Stuck at Fault Model]] | ||
+ | |- valign="top" | ||
+ | | '''authors''': | ||
+ | | Anna Bernasconi, Valentina Ciriani, and Luca Frontini | ||
+ | |- valign=top | ||
+ | | '''presented at''': | ||
+ | | [http://vlsi-soc.di.univr.it/ International Conference on Very Large Scale Integration (VLSI-SoC)], Verona, Italy 2018 | ||
+ | |} | ||
+ | |||
+ | | align=center width="70" | | ||
+ | <span class="plainlinks"> | ||
+ | [[File:PDF.png|65px|link=http://www.nanoxcomp.itu.edu.tr/images/d/d5/Testability of Switching Lattices.pdf]]</span> | ||
+ | <br> | ||
+ | [[Media:Bernasconi_EtAl_Synthesis_on_Switching_Lattices_D_Reducible.pdf | Paper]] | ||
+ | | align="center" width="70" | | ||
+ | <span class="plainlinks"> | ||
+ | |||
+ | [[File:PDF.png|65px|link=]] | ||
+ | </span> | ||
+ | <br> Slides | ||
+ | |} | ||
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Revision as of 14:44, 21 July 2018
All materials are subject to copyrights.
Contents |
Comprehensive Project Papers
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Papers on Logic Synthesis
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Papers on Performance Modeling and Optimization
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Papers on Synthesis Methodology
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Papers on Emerging Crossbar Memories
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